There's More to The RISC-V China Story
By Junko Yoshida, EEtimes
November 22, 2018
A professor in Beijing corrected us that the China Open Instruction Ecosystem (RISC-V) Alliance, known as CRVA, is no splinter group. We stand corrected. But the fact remains that RISC-V activities in China are fragmented.
Being a reporter is like being the guy who’s trying to bail out the ocean. I know that there is always more to the story than the copy I just filed. My recent blog about RISC-V activities in China is typical.
As soon as my piece, entitled “Why RISC-V Lags in China,” posted on EE Times’ website, I got blowback from Yungang Bao, a professor at the Institute of Computing Technology, Chinese Academy of Sciences in Beijing.
He requested that I set the record straight on three points.
To read the full article, click here
Related Semiconductor IP
- RISC-V Display Connectivity Subsystem (DCS)
- RISC-V IOPMP IP
- RISC-V Debug & Trace IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- 64-bit RISC-V core with in-order single issue pipeline. Tiny Linux-capable processor for IoT applications.
Related News
- A 10-cent RISC-V microcontroller from China? Why not?
- RISC-V Solidifies Presence in China as Global Momentum Builds
- China Unyielding Ascent in RISC-V
- RISC-V Exceeding Expectations in AI, China Deployment
Latest News
- SkyeChip Berhad Delivers 35.0% Net Profit Growth Ahead of Main Market Debut on 20 May 2026
- Quantum eMotion and JMEM TEK Sign Consortium Agreement to Accelerate Quantum-Resilient Semiconductor SoC Development
- Silvaco Announces Immediate Availability of Mixel MIPI C-PHY/D-PHY Combo IP on TSMC N2P Process
- BrainChip Strikes IP Licensing Deal with ASICLAND
- Arteris Technology Adopted by Li Auto for Intelligent Vehicles