Passing the Compliance Test, Faraday Launch PCIe2.0 at 90nm

By robust design capabilities and accumulated HSIO experiences, Faraday's leading introduction of PCIe GII again proves its competitiveness in market

Taipei -- April 28, 2009 -- Faraday Technology Corporation (TAIEX: 3035), a leading fabless ASIC and IP provider, today announced that their PCIe GenII PHY, developed based on the PCI Express 2.0 specification, has passed PCI-SIG® APAC compliance test in April. As the 1st to pass the test in Taiwan, Faraday's PHY IP, backwards compatible to Gen I at 2.5Gbps, offers better performance in jitter, margin, and sensitivity receiving than spec requirement. This PHY is designed for UMC 90nm process and now available for ASIC customers.

PCIe 2.0 doubles the speed of PCIe 1.0 from 2.5Gbps to 5Gbps per lane, fitting the arising demand of those speed-hunger applications like storage, networking, graphics, and chip-to- chip data interlink. With the introduction of PCIe GII, Faraday can assist customers to enter more emerging markets and upgrade the performance of their current product lines. Further, by leveraging Faraday's broad IP database and great ASIC capabilities, customers will benefit from the one stop shopping and lower the risk of IC integration.

"Cohering with the abundant experiences in high-speed IO, Faraday has stood out among the peers in terms of both technology development and market expansion, which contributes to the honour to provide certified PCIe Gen II PHY in the lead," said Steve Wang, Chief Strategy Officer at Faraday. "So far, we have got several design-win cases, covering Express card and bridge applications, and more cases are now under cooking."

Since PCIe1.0, Faraday has accumulated experiences of system tests and cooperation with customers, which gradually consolidates Faraday's in-depth know-how towards HSIO development. Worth mentioning, Faraday team comprehends the robust equalizer technology, essential and of high entry barrier, to compensate the insertion loss of transferring, and therefore incubate its momentum to next generation of PCIe.

"We are glad to announce that we, by first-cut work, passed PCI-SIG® APAC compliance test in shorter lead time than peers, and its feature of smaller size is especially a great plus to its competitiveness in market," said Wilson Tzang, Chief Operation Officer at Faraday. " The achievement not only recognizes RD team's great effort, but also indicates an important fact that Faraday has possessed robust design capabilities required for the SerDes development toward next generation."

Availability
The certified and available PCIe product line covers:

• PCIe1.0 PHY at 0.18um, and 0.13um
• PCIe2.0 PHY at 90nm
• PCIe2.0 end point controller

About Faraday Technology Corporation
Faraday Technology Corporation is a leading fables ASIC and silicon IP provider. The company's broad silicon IP portfolio includes Cell Library, Memory Compiler, ARM-compliant CPUs, DDRI/II/III, MPEG4, H.264, USB 2.0/3.0, 10/100 Ethernet, Serial ATA, and PCI Express. With 2008 revenue of US$ 149 million, Faraday is one of the largest fabless ASIC companies in the Asia-Pacific region, and it also has a significant presence in other world-wide markets. Headquartered in Taiwan, Faraday has service and support offices around the world, including the U.S., Japan, Europe, and China. For more information, please visit: www.faraday-tech.com.