NEC plans to use Tensilica's DSP engine in system-level ICs

NEC plans to use Tensilica's DSP engine in system-level ICs
By Semiconductor Business News
November 15, 2000 (8:54 a.m. EST)
URL: http://www.eetimes.com/story/OEG20001115S0003

SANTA CLARA, Calif.--Tensilica Inc. here today said NEC Corp. has opted to upgrade its licensing agreement with the company to gain access to new Xtensa III processor core technology and the Vectra digital signal processor (DSP) engine.

Six months ago, NEC began implementing system-on-chip designs using Xtensa technology, and the result encouraged the Japanese company to extend its licensing agreement to cover the new DSP engine, said Bernie Rosenthal, vice president of marketing and business development at Tensilica.

Makoto Tazaki, general manager of NEC's Network Node Division, said his company has used Tensilica's cores to implement custom processors for next-generation communication products and now design teams will be able to accelerate their development cycles with the Vectra DSP engine.

During June, Tensilica disclosed the Vectra DSP technology, saying it was capable of executing around 400 million floating point operations per second (MFLOPS). The DSP engine requires just 25,000 gates of logic, taking up 1.2-to1.5 square millimeters of die space using a 0.18-micron process, according to the three-year-old Santa Clara company (see June 14 story).

Separately, Tensilica today announced a licensing agreement with the Media-Centric Low-Power LSI Design Project at Osaka University and Kyoto University. The project will use the Tensilica's processor generator for the development of a variety of advanced video and audio processing systems for mobile systems applications. To date, Tensilica has inked licensing pacts with Cisco, Fujitsu, NEC, Galileo Technology, NTT, Berkeley Wireless Research Center, Onex Communications, TranSwitch, and Zilog.