Morpho Technologies delivers software programmable WCDMA chip-rate processing solution for infrastructure applications
Dallas, TX, March 31, 2003 - Morpho Technologies successfully demonstrated and delivered the MS1-16 reconfigurable Digital Signal Processor (rDSP) in 0.13micron CMOS to Motorola - Semiconductor Products Sector, a global leader in providing integrated communications solutions. Morpho Technologies will exhibit and demonstrate at the GSPx & International Signal Processing Conference, March 31 through April 3rd. The Morpho Technologies’ MS1-16 rDSP provides a software programmable SoC core for implementation of the chip-rate processing portion of WCDMA for infrastructure applications. The MS1-16 rDSP combines a unique group of hardware and software capabilities enabling customers to have a completely programmable WCDMA baseband processing solution.
The MS1-16 rDSP Core, now available in test silicon, meets the needs of both current and emerging wireless demands for base stations by allowing customers to rapidly develop and launch new products featuring the latest algorithms supporting 2G, 2.5G, and 3G standards. Morpho Technologies’ fully software programmable solution provides a platform that allows infrastructure chipset and equipment manufacturers to remotely deploy upgrades as standards evolve and new software becomes available.
The MS1-16 rDSP Core joins the previously released MS1-64 rDSP Core, both of which are currently available to customers as soft IP cores as well as functioning in silicon within the Morpho Technologies Development Systems. The MS1 rDSPs are multiple element processing arrays designed to provide processing capacity required by infrastructure and portable designs that implement multiple data processing applications. Example applications include WCDMA/CDMA, GSM/GPRS/EDGE, 802.11, GPS, MPEG, JPEG, voice, and audio.
As applications evolve, off-chip software modifications eliminate the need for new ASIC devices. The result is a significant reduction in design time as well as a risk reduction in making chips. With the new technologies from Morpho Technologies, portable device and infrastructure manufacturers can build products and know they can easily be upgraded and modified, even if it has to sit in inventory for a while.
"The MS1 rDSP supports the rapid implementation of applications as well as the on-the-fly switching between applications,” comments Todd Nash, Vice President, Business Development, Morpho Technologies. "For example, the MS1 allows for the dynamic switching between data and voice channel processing for infrastructure systems without the need for separate signal processing paths in silicon, thereby significantly reducing silicon area, cost, and power consumption"
Related Semiconductor IP
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
Related News
- EnSilica to develop quantum-resilient secure processor chip for critical national infrastructure applications backed by £5m UK Government ‘Contract for Innovation’
- Rambus Launches CryptoManager RISC-V Root of Trust Programmable Secure Processing Core
- MoSys Partners with Silicom to Provide Stellar Packet Classification IP Optimized for Intel FPGA-Based SmartNICs and Infrastructure Processing Units
- Renesas Expands RISC-V Embedded Processing Portfolio with New Voice-Control ASSP Solution
Latest News
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer
- SEMI Reports Worldwide Silicon Wafer Shipments Increase 13% Year-on-Year in Q1 2026
- POLYN Technology Announces Tapeout of Automotive Chip
- QuickLogic Establishes New Banking Relationship and Secures $10 Million Revolving Credit Facility
- TES is extending its PMU IP portfolio for X-FAB’s XT018 - 0.18µm BCD-on-SOI technology.