Lattice Deal: Harbinger of FPGA & ASSP Union
Junko Yoshida, EETimes
5/1/2015 07:42 PM EDT
MADISON, Wis. — Darin Billerbeck, president and CEO at Lattice Semiconductor, after its acquisition of Silicon Image in March, believes the marriage of FPGA company to an ASSP firm is a match made in heaven.
Billerbeck said in a recent phone interview with EE Times, “That’s why Intel wants Altera. It’s obvious.”
How obvious depends on where you sit in the electronics market.
As far as the potential Intel-Altera deal is concerned, the intrigue continues.
To read the full article, click here
Related Semiconductor IP
- TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
- TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
- TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
- TSMC 3nm 3V3 ESD Local Clamp
- TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
Related News
- Lattice Semiconductor Completes Acquisition of AMI
- Lattice Announces First Programmable ASSP (pASSP) Interface Bridge for Mobile Image Sensors and Displays
- Lattice Semiconductor Expands CrossLink Programmable ASSP (pASSP) IP Solutions
- China condemns protectionism after Lattice deal blocked
Latest News
- First Benchmarks Revealed for Jalapeño, OpenAI’s Clean-Sheet General Purpose AI Accelerator ASIC
- MIPS Leads Open Standards Development for Physical AI Platforms as RISC-V International Premier Member
- SEALSQ’s Subsidiary IC'Alps Advances QASIC Roadmap for Sovereign, Quantum-Resistant Application-Specific Integrated Circuits
- NVMe 2.4 Update Adds Post-Quantum Security, Power Controls
- Agentrys Raises $24.5 Million to Build Agentic Design Automation for Chipmakers