Mentor CEO: IC design costs to hit $100M
Mark LaPedus, EE Times
(03/03/2010 1:12 PM EST)
SAN JOSE, Calif. -- Chip design costs are expected to soar, but software--not hardware--is playing a much greater role in the problematic equation, according to the top executive of Mentor Graphics Corp.
The shift in the equation will require a new type of EDA technology-- embedded software automation (ESA)--as a means to attack the problem, said Walden Rhines, chairman and chief executive of Mentor.
Rhines warned that IC design costs for many devices are projected to hit the dreaded $100 million level within the next three years. Not long ago (and even today), IC design costs ranged between $20-to-$50 million
To read the full article, click here
Related Semiconductor IP
- AXI5 to/from AXI4 Bridge
- AXI5-Stream to/from AXI4-Stream Bridges
- APB5 to APB4 bridge
- UALink PHY + Controller
- General Purpose Low-Dropout (LDO) - TSMC
Related News
- Robust AI Demand Drives 6% QoQ Growth in Revenue for Top 10 Global IC Design Companies in 1Q25
- Secure Your IC Design Project Slot with CoreHW for Q4 2025 & 2026
- IC Manage Advances GDP-AI for Custom IC Design with Virtuoso
- Celera Semiconductor Acquires Portugal-Based SiliconGate, a Global Leader in Analog IC Design
Latest News
- SambaNova Completes First Close of $1B Financing at $11B Valuation
- TAKUMI starts licensing new Warping IPs “TW270” and “TW290”
- Quintauris Announces Planned Leadership Transition
- CAST Licenses TCP/IP Hardware Stack Core for Keysight FieldFox Handheld Spectrum Analyzers
- Global Semiconductor Sales Increase 9.2% Month-to-Month in May