CAST Introduces H.264 Video Over IP Subsystem to Simplify Video Streaming Product Development
Woodcliff Lake, NJ â October 10, 2013 â Semiconductor intellectual property provider CAST, Inc. has released a reusable subsystem and suite of hardware reference designs that make it easier to build video streaming into mobile and other products.
The new H264OIP-HDE Subsystem integrates three IP cores available from CAST: the H.264 High Profile Video Encoder (H264-HP-E) core for high-quality video compression, and the RTP and UDP/IP hardware stacks for encapsulating video for Internet Protocol transmission. Flexible video, memory, and network interfaces simplify system integration, and optional logic blocks enable standalone, processor-free subsystem operation. Available hardware reference design systems provide a turnkey jumpstart to streaming system development.
The new subsystem is an especially competitive solution for low-latency applications that demand minimal video delay. The advanced rate control capabilities of the H.264 encoder core, the near-zero latency of the hardware RTP/UDPIP encapsulation, and the ability to directly process the uncompressed video stream as presented by the capturing device together enable the H264OIP-HDE Subsystem to stream video with ultra-lowâsub-5nsâlatency. Furthermore, the subsystemâs dedicated hardware implementation means it consumes significantly less energy than any similar software-based alternative.
âThis new video over IP subsystem makes the superior H.264 compression we offer drop-in ready for high-performance, low-latency, low-energy, video streaming over Ethernet or Wi-Fi,â said Nikos Zervas, chief operating officer for CAST. âCompleting the solution are FPGA reference designs for turnkey HDMI- or DVI-to-Ethernet streaming in hardware, and customization services through which we can deliver a pre-packaged and fully-verified combination of any video-in or network controllers a customer requires.â
Reference designs for the streaming subsystem are available now for the Altera® Stratix® IV and Arria® V families, and the Xilinx® Kintex®-7 line. These include the CAST and other essential IP cores implemented in an FPGA, plus the necessary interfaces, memory, drivers, and software.
CASTâs IP customization services are available to integrate the Subsystem with a variety of memory controllers, input video interfaces (e.g., DVI, HDMI, MIPI-CSI, or SDI), and IP-based MAC controllers (e.g., Ethernet or 802.11 Wi-Fi). Other options include multiple video channels, different video preprocessing modules, or different compression algorithms (e.g., JPEG or JPEG 2000), and mapping the subsystem to different FPGA platforms.
The H264OIP-HDE Subsystem in RTL for ASICs or netlists for FPGAs is available now, including the H.264 Encoder Core (sourced from Alma Technologies SA) and the CAST RTP and UDP/IP Cores, other essential functions, complete documentation, and more. Call CAST at +1 201.391.8300 or visit www.cast-inc.com for more information.
Related Semiconductor IP
- H.264 Decoder
- H.264 Encoder
- H.264 - Efficient video compression for high-quality streaming and playback
- H.264 Codec - Efficient video compression for high-quality streaming and playback
- H264 ENCODER IIP
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