Eliyan Introduces NuLink™-XD, a New Class of Power-Reach Configurable 224G PAM4 SerDes Enabling the Industry’s Lowest-Power Electro-Optical Modules for AI Scale-Up

Purpose-built for AI Interconnects in Chip-to-Chip and Chip-To-Module applications, Eliyan’s NuLink™-XD 224G SerDes Enables Next-Generation Implementations such as Near-Package Optics, OSFP and XPO

• Up to 40% lower power enables system architects to dedicate more system power to compute or deploy more high-speed links within the same power budget.
• Designed on TSMC 3nm, purpose-built for Chip-to-Chip and Chip-to-Module with highly configurable power-reach optimization, enabling ultra-low-power optical modules for next-generation AI scale-up fabrics.
• Highly configurable power-reach architecture supporting both Chip-to-Chip and Chip-to-Module applications, allowing designers to optimize power for the specific electrical channel while maintaining compatibility with standard 224G interfaces

SANTA CLARA, California – July 27, 2026 – Targeting the growing need for more efficient and scalable electro-optical interconnects, Eliyan, a leader in foundational connectivity technologies enabling next-generation AI compute, memory, and networking systems, today unveiled NuLink™-XD, its new power-reach configurable 224G PAM4 SerDes architecture purpose-built for the bandwidth demands of AI/ML infrastructure, hyperscale data centers, networking, and high-performance computing (HPC). Built on TSMC’s advanced 3nm process node, the new SerDes delivers industry-leading power efficiency versus channel reach, enabling system architects to scale aggregate bandwidth without compromising on power.

As AI workloads continue to drive exponential growth in data movement, the interconnect between compute, memory, and optical engines has emerged as one of the most critical bottlenecks in system design. The dominant electrical interfaces on next-generation GPUs and switches are expected to remain at 224G PAM4 for the foreseeable future, while AI scale-up fabrics continue to expand beyond a single rack.

Passive copper links are unsuitable for rack-to-rack connectivity in AI pods containing hundreds of GPUs at data rates of 224G and above. The industry is rapidly transitioning toward longer-reach optical architectures, including Near Package Optics (NPO), Co-Packaged Optics (CPO), and Linear Pluggable Optics. These architectures fundamentally change the role of high-speed SerDes. Eliyan’s NuLink™-XD addresses this challenge with a power-reach configurable 224G SerDes optimized for Chip-to-Chip and Chip-to-Module electrical channels, enabling the industry’s lowest-power electro-optical interconnects

AI scale-up fabrics are rapidly becoming one of the largest consumers of high-speed interconnects in modern AI data centers. Because scale-up networks require more than twenty times as many links as all other interconnects combined, minimizing the power consumed by every interconnect has become a system-level priority. Rather than optimizing for the longest electrical channels, NuLink™-XD is specifically architected for Chip-to-Chip and Chip-to-Module applications, reducing SerDes power while enabling optical links capable of supporting large AI pods spanning multiple racks.

“The AI industry is approaching an inflection point where the limitation is no longer compute – it’s moving data efficiently between compute resources. Optical interconnect is becoming essential, but lowering the power required to reach those optical engines is just as important,” said Ramin Farjadrad, founder and CEO of Eliyan. “NuLink-XD was designed specifically for that challenge. Because it is purpose-built for Chip-to-Module and Chip-to-Chip applications, its power-reach configurable architecture minimizes SerDes power while enabling standard 224G electrical interfaces to seamlessly transition into optical links

Explore Eliyan IP:

• Die-to-Memory (D2M) PHY
• Die-to-Die PHY

Built for the AI and Hyperscale Era

NuLink™-X SerDes is designed to serve as a foundational building block for next-generation chiplet-based architectures, co-packaged optics, and disaggregated compute systems. With its combination of low power, robust reach, and built-in diagnostic features, the IP is well suited for:

• AI/ML accelerators and chiplet-to-module interconnects
• Hyperscale data center switching and networking silicon
• High-performance computing (HPC) interconnect fabrics
• Near-packaged optics and optical engine interfaces

Eliyan’s NuLink™-XD forms a core building block of the company’s roadmap for scale-up AI interconnect solutions. Eliyan is actively engaged with lead customers and partners to bring this technology into next-generation system designs.

About Eliyan

Eliyan Corporation develops advanced connectivity technologies that enable next-generation AI, cloud, and high-performance computing systems. Its portfolio of differentiated interconnect technologies, memory expansion, and chiplet solutions addresses critical bandwidth, power efficiency, and scalability challenges across modern compute infrastructure. Eliyan’s technologies enable customers to build higher-performance systems with greater memory capacity, improved power and area efficiency, and most importantly, higher bandwidth at lower cost. For more information, visit www.eliyan.com.