Can AI Design a Better Chip Than a Human?
By Sally Ward-Foxton, EETimes (August 26, 2021)
Is entirely autonomous chip design possible? Can AI behave as an “artificial architect,” designing and optimizing entire chips?
This is the question Synopsys CEO Aart de Geus set out to answer in his keynote presentation at Hot Chips. The answer is a resounding “yes”.
Synopsys has long been working on using AI in its EDA tools (according to De Geus, all Synopsys tools today use AI in one form or another). Its flagship AI-powered tool, DSO.ai, launched last year. DSO tackles all the tasks in the geometry of chip design, that is, all the physical aspects of the design, in contrast to some other AI-based tools which tackle bits of this task only. DSO is named for design space optimization, Synopsys’ vision of the next step in today’s design space exploration process.
To read the full article, click here
Related Semiconductor IP
- SWI3S Verification IP
- Secure Boot Loader
- Memory Subsystem
- 4/8-bit mixed-precision NPU IP
- Compiler-centric single-core LPU
Related News
- Seligman Ventures Leads Cognichip’s $60M Series A to Back Physics-Informed AI for Chip Design, Intel CEO Lip-Bu Tan and Seligman Ventures’ Umesh Padval Join the Board
- ChipAgents Raises Oversubscribed $21M Series A to Redefine AI for Chip Design
- Cadence Unleashes ChipStack AI Super Agent, Pioneering a New Frontier in Chip Design and Verification
- ChipAgents Expands Series A Funding to $134 Million as Demand Grows for Agentic AI in Semiconductor Design
Latest News
- Openchip unveils BER10: Europe’s new sovereign chip is here
- SEMIFIVE Accelerates Growth with 97% YoY Revenue Surge in H1 2026, Powered by ASIC Turnkey, Mass Production, and IP
- Andes Technology has shut down Condor Computing
- TIER IV joins JST’s Next-Generation Edge AI Semiconductor R&D Program to open-source AI chip designs for autonomous driving
- BrainChip Partners With Orama.AOI For AI-Fueled Defect Detection