Asiczen Releases its APB Verification IP
September 26, 2016 -- Asiczen Technologies announces the release of its UVM based APB verification IP. azAPB is fully compliant with AMBA APB specification. azAPB is a UVM based verification component (UVC) that can be used by IP and SOC makers to test their APB interface design effectively and quickly.
This easy-to-use UVC can be easily integrated to any UVM based environment and can be used to generate a variety of scenario without much effort. APB is designed for low bandwidth control accesses, for example register interfaces on system peripherals. This bus has an address and data phase similar to AHB, but a much reduced, low complexity signal list.
Related Semiconductor IP
- DC-DC Split-Pi Boost-Buck Converter
- Deep learning accelerator
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
Related News
- Digital Blocks Announces the DB-I2C Controller IP Core with the availability of Master-Slave, Master, and Slave Versions for the AMBA 2.0 APB Interconnect
- Digital Blocks Announces I2C-Master Controller IP Core Family with the availability of the DB-I2C-M for the ARM AMBA 2.0 APB and Altera NIOS II Avalon Interconnects
- Digital Blocks Supports the AMBA Interconnect on Xilinx FPGAs with its portfolio of AXI / AHB / APB IP Cores
- Cortus Announces Bridges for AHB-Lite and APB to Enable Migration to the APS and FPS Processor Product Range
Latest News
- Chipsolve Technologies Appoints Balaji Kanigicherla as Chairman of the Board
- OXMIQ Raises $35 Million to Scale OxCore™ Architecture
- SOC-E successfully showcases Time-Sensitive Networking (TSN) application for NGWS/FCAS Remote Carrier (Pillar 3)
- Xiphera Strengthens Its Presence in Japan with the Appointment of Yasuhiro Okumura as Country Manager
- TES offers a new DC-DC Split-Pi Boost-Buck Converter IP in X-FAB XT018-0.18µm BCD-on-SOI CMOS