TSMC Expansion in Arizona to Target 3-nm Node
2022-11-15 10:14:00
Analysis & Insight
Semiconductor IP News Archive - Page 232 of 1970
StarFive Releases StarFive StarStudio IDE, which supports both Linux and Baremetal Development
2022-11-15 08:38:00
SoC Architecture & Assembly
Consortium forms Rapidus to get Japan back into chip race at 2nm
2022-11-14 14:30:00
Analysis & Insight
Nexperia invests in sustainable alternatives to batteries by acquiring Delft-based Nowi
2022-11-14 13:56:00
Strategic Partnerships
Arasan announces MIPI CSI IP for FPGA supporting full C-PHY 2.0 speeds
2022-11-14 13:40:00
IP Cores & Design
Ultra-high-speed 14-bit at 4.32Gbps ADC IP Cores are available for licensing, with increased accuracy and high sampling rate for a variety of applications
2022-11-14 12:10:00
Misc
ZeroPoint Technologies can reduce data center energy consumption by 25%
2022-11-14 09:16:00
IP Cores & Design
JEDEC Announces Publication of the SPD5118 Hub and Serial Presence Detect Device and the DDR5 SPD Contents Specifications
2022-11-14 04:01:00
Misc
SiPearl and AMD collaborate to address exascale supercomputing in Europe
2022-11-14 03:51:00
Strategic Partnerships
Marvell Announces Innovative CXL Development Platform for Multi-Host Memory Pooling
2022-11-14 03:32:00
SoC Architecture & Assembly
QuickLogic Inks eFPGA Sales Rep Agreement with CHIP-gogo in Japan
2022-11-14 02:11:00
Misc
Signing of a Large Contract with an Industry Leader for Kalray's DPU Processor
2022-11-14 01:38:00
Strategic Partnerships
Fraunhofer IPMS combines latest hardware in microsensor and actuator technology with artificial intelligence
2022-11-14 01:02:00
Misc
Arm technology is defining the future of computing: Record royalties highlight increasing diversity of products and market segment growth
2022-11-11 11:18:00
Financials
After 1Q23 Bottom, Expectations Increase for a 2Q23 IC Market Rebound
2022-11-11 08:09:00
Analysis & Insight
Bringing next-level 3D gaming to life with Arm Immortalis
2022-11-11 07:56:00
IP Cores & Design
ShortLink AB and Dolphin Design partner to create a highly energy-efficient Sub-GHz ASIC design platform
2022-11-11 07:47:00
IP Cores & Design
Cryogenic CMOS design enabled by Semiwise
2022-11-11 05:07:00
EDA & Design Tools
Codasip to boost RISC-V security through Cerberus acquisition
2022-11-10 16:51:00
Strategic Partnerships
LC3plus certified for the Hi-Res Audio Wireless Logo
2022-11-10 16:49:00
Misc