Single unified toolchain empowering processor research

By Codasip

May 23, 2022

The RISC-V’s open Instruction Set Architecture (ISA) has spurred the innovation of free software tools and application software. Many of these software developments are software “islands” that must be combined through scripts. With different tools from different sources, continual interoperability is at risk and there is a support cost of monitoring and updating their interoperability. The alternative is a single unified toolchain. The benefit of the unified approach is twofold. First, the obvious case in that the toolchain upgrades are validated before releases ensuring a functional toolchain reducing or eliminating the required monitoring of different tools and upgrading required scripts. The second benefit is not as obvious but may be the most important: through a single unified toolchain, researchers benefit from enhanced tools.

The Codasip’s University Program makes available Codasip Studio, a single unified for processor architecture’s ISA specifications, development of the processor’s hardware architecture, software development tools, to outputting RTL such as Verilog for FPGA and ASIC synthesis. The University Program has been developed to spur innovation in research and student curriculum. Let’s see, in this blog post, how Codasip Studio will benefit researchers and engineering students.

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