Silicon IP to take over CAE in EDAC results... soon but not yet!
July 21, 2011
Very interesting results launched by EDAC for Q1 2011, if Computer Aided Engineering (CAE) is still the largest category with $530.6M, the second category is Silicon IP (SIP) with $371.4M, followed by IC Physical Design & Verification at $318.5M. Even more significant is the four quarter moving average results, showing growth in every category, +12.9% for CAE and +7.6% for IC PD & V, but as high as +27.9% for SIP!
To read the full article, click here
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related Blogs
- Cadence Silicon Success of UCIe IP on Samsung Foundry’s 5nm Automotive Process
- Silicon Creations Presents Architectures and IP for SoC Clocking
- The Road to Innovation with Synopsys 224G PHY IP From Silicon to Scale: Synopsys 224G PHY Enables Next Gen Scaling Networks
- From "What-If" to "What-Is": Cadence IP Validation for Silicon Platform Success
Latest Blogs
- CDM Dependence on Device Capacitance
- What the Cyber Resilience Act means for the future of chip design
- When Your IP Vendor Has Operated 150,000 Base Stations: Introducing Viettel Semiconductor
- Relationship between architecture and validation in system design
- The Post-Quantum Cryptography Mandate: Building Cryptographically Agile Systems for the Quantum Era