Selecting custom ESD IP for your next IC
May 16, 2022
Fabless semiconductor companies usually use third-party IP blocks when developing ICs. An important IP is on-chip ESD protection. Caution must be exercised in choosing the right ESD IP to avoid patent infringement and inefficient ESD clamps.
ESD IP of choice should be silicon proven and directly compatible with your usual design process. Thomas Ako made a presentation about the IP selection process on the 2021 IP-SOC event in Grenoble in December 2021.
To read the full article, click here
Related Semiconductor IP
Related Blogs
- The Hidden Threat in Analog IC Migration: Why Electromigration rules can make or break your next tapeout
- Breaking the Bandwidth Barrier: Enabling Celestial AI’s Photonic Fabric™ with Custom ESD IP on TSMC’s 5nm Platform
- Crypto mining SoC unearths a need for custom IP
- The Next-Generation UCIe IP Subsystem for Advanced Package Designs
Latest Blogs
- Designing for What Comes Next in AI
- Secure boot on Efinix Titanium Ti60: Getting started with KiviBoot-Tiny
- How Long Does It Take to Port a New AI Model? Minutes Now, and Falling
- PCI Express Security and TEE Integration, Part 1 - Establishing Trust
- World Models at the Edge, in Real Time: V-JEPA 2.1 on the Quadric GPNPU