RISC-V 5th Workshop Highlights
The fifth (Vth?) RISC-V workshop took place this week at Google in Mountain View. This was actually the third workshop this year. Rick O'Connor, the executive director of the RISC-V foundation, opened the meeting. "It's been quite a year," he said, giving the statistics. At the workshop, there were 350 attendees (up over 100 since the workshop in July), who represented 107 companies and 30 universities. There were actually too many people to fit into the lecture theater at Google, and so there was also an overflow room with a video feed.
To read the full article, click here
Related Semiconductor IP
- SpaceWire Node IP core
- nQrux Secure Boot
- 4K/8K Multiformat IP supporting AV2 decoder
- Ultra Ethernet MAC & PCS 100G/200G/400G/800G
- Ethernet PCS 100G/200G/400G/800G/1.6T
Related Blogs
- Samsung Highlights Work to Bring RISC-V to Tizen
- 400G Task Force, 100G Backplane Project and Other Highlights from IEEE 802.3 Ethernet Standards Meeting
- Highlights from Recent IEEE 802.3 Ethernet Standards Meeting
- USB Type-C Interoperability Workshop - True, Real-Life Validation
Latest Blogs
- A Repeatable Framework for Hardware Security Assurance
- Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
- What the steam engine can teach us about modern chip design
- Automotive silicon in the era of AI, functional safety, and cybersecurity
- JPEG XS Officially Joins GenICam, The Machine Vision Standard Managed By EMVA