Leveraging AI to Optimize the Debug Productivity and Verification Throughput
The impact of semiconductors on various sectors cannot be overstated. Semiconductors have revolutionized our operations from the automotive industry to IoT, communication, and HPC. However, as demand for high performance and instant gratification increases, the complexity of SoCs has grown significantly. With hundreds of IPs integrated into SoCs, bugs have become more common and challenging to fix. The verification process at the SoC level is causing significant delays in tapeout schedules. Detecting bugs within the allocated budget and timeline is becoming increasingly difficult, especially with the reduced geometries and increased gate counts. With SoC design engineers spending more than 70% of their verification time, detecting a single bug takes an average of 16-20 engineering hours. Imagine the impact of having 1000 bugs in a design!
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