Is SOI Really Less Expensive?
There have been some claims made recently that planar Fully Depleted Silicon On Insulator (FDSOI) is less expensive than bulk planar processes and FinFETs at various nodes. Some of these claims suggest that FinFETs in particular are significantly more expensive. My company, IC Knowledge LLC produces the most widely used IC cost modeling software in the semiconductor industry. Recently we have developed a new version of our Strategic Cost Model that is particularly well suited for cost comparison between bulk, FDSOI (planar) and FinFETs (both on bulk and SOI). In the rest of this article I will presents some results from these comparisons.
To read the full article, click here
Related Semiconductor IP
- NoC Interconnect IP Generator
- Over-Voltage Lockout (OVLO) IP
- Verification IP for Universal Chiplet Interconnect Express (UCIe) up to 3.0
- UCIe-S (Gen2) Compatible PHY for Standard Package (x16) in TSMC N3P, North/South Orientation
- DSP-Based 112G SerDes
Related Blogs
- AI: when is it "really" intelligent?
- Analog Bits and SEMIFIVE is a Really Big Deal
- Is DisplayPort really the future standard?
- Management of Projects - Is it really working?
Latest Blogs
- Building the engine behind Arm’s silicon shift
- M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C
- Understanding security certification and how analog IP can help
- Embedded Security explained: Secure boot for embedded systems
- World's First Standards-Compliant 112G PHY IP for Linear Optics: A Turning Point for AI Interconnects