Has Intel Got It Wrong On Finfets?
Intel's triangular finfets suffer a severe performance disadvantage to rectangular finfets and a further disadvantage in respect to SOI finfets, says Professor Asen Asenov of Glasgow University who is the CEO of Gold Standard Simulations.
"Intel may have technological reasons for adopting this shape but by doing so you reduce performance by 12-15%," Asenov tells me.
To read the full article, click here
Related Semiconductor IP
- nQrux® Root of Trust IP
- AXI to UCIe Bridge IP
- UCIe 2.x Controller IP
- SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP
- OpenTitan-based RISC-V Secure Element
Related Blogs
- TSMC vs Intel vs Samsung FinFETs
- Intel, Arm, 3D FinFETs & mobile computing's future
- ARM's New CEO Relishes Intel Competition.
- 'Take An ARM licence,' Saxby Tells Intel.
Latest Blogs
- From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development
- Manufacturing Intelligence: Turning EDA Data into Trusted Action
- Execute-in-Place: Getting More from Embedded NVM
- Rethinking RTL flows with AI-driven hybrid formal verification
- Arm and NVIDIA: Building the trusted compute foundation for the agentic AI era