HPSC: RISC-V in Space
NASA needs a new computer. Being NASA, of course, this has an acronym, HPSC. Unusually for NASA, this has four letters, not three. Remember back in the Apollo program (assuming you were born) when we all knew what TLI, LEM, and all the rest stood for? HPSC stands for High Performance Space Computer. The plan is that in the future, everything that NASA and JPL (NASA Jet Propulsion Laboratory in Pasadena, CA) will be HPSC-based, but there is also an expectation that it will have commercial applications such as in aviation. Space missions are largely autonomous, and that requires computer power. Lots of it. Very early on, it was decided that the new HPSC would use RISC-V for its ISA, not something proprietary or something NASA/JPL created themselves. In fact, I think it most unlikely that anyone will ever again define an ISA that is not RISC-V based.
To read the full article, click here
Related Semiconductor IP
- TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
- TSMC 65nm 3V3 ESD Local Clamp – Rad Hard
- TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
- TSMC 3nm 3V3 ESD Local Clamp
- TSMC 3nm 1V2 ESD Local Clamp – Low Capacitance
Related Blogs
- RISC-V and GPU Synergy in Practice: A Path Towards High-Performance SoCs from SpacemiT K3
- NASA Uses RISC-V Vector Spec to Soup Up Space Computers
- NOEL-V: A RISC-V Processor for High-Performance Space Applications
- How to Design a RISC-V Space Microprocessor
Latest Blogs
- Beyond Trusted: What the NSA’s New Guidance Means for Hardware Security
- A scalable, shader-programmable vector graphics GPU core for low-power MCUs
- Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects
- Embedded Security explained: Digital signatures
- Hardware security verification must go beyond functional testing