Want to know the three lessons for GLOBALFOUNDRIES from its 28nm high-K, metal-gate development?
Yesterday, I attended the Global Technology Conference, a chip-making extravaganza underwritten by GLOBALFOUNDRIES and its partners. Got several blog posts to write about this information-packed day but thought I’d start with the three lessons that GLOBALFOUNDRIES learned from its 28nm high-K, metal-gate development, as told by Gregg Bartlett, Senior VP of Technology and Engineering at GLOBALFOUNDRIES.
Here are the lessons:
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