Want to know the three lessons for GLOBALFOUNDRIES from its 28nm high-K, metal-gate development?
September 1, 2011
Yesterday, I attended the Global Technology Conference, a chip-making extravaganza underwritten by GLOBALFOUNDRIES and its partners. Got several blog posts to write about this information-packed day but thought I’d start with the three lessons that GLOBALFOUNDRIES learned from its 28nm high-K, metal-gate development, as told by Gregg Bartlett, Senior VP of Technology and Engineering at GLOBALFOUNDRIES.
Here are the lessons:
To read the full article, click here
Related Semiconductor IP
- MIL-STD-1553 Controller IP
- UFS 5.x Device IP
- UCIe 3.x Controller IP
- Ethernet 800G PCS IP
- CHI to UCIe Bridge IP
Related Blogs
- 28nm Ramp Starts At Globalfoundries
- Globalfoundries 22FDX Technology Shows Advantages in PPA over 28nm Node
- 28nm-SLP technology - The Superior Low Power, GHz Class Mobile Solution
- UMC versus GLOBALFOUNDRIES
Latest Blogs
- CDM Dependence on Device Capacitance
- What the Cyber Resilience Act means for the future of chip design
- When Your IP Vendor Has Operated 150,000 Base Stations: Introducing Viettel Semiconductor
- Relationship between architecture and validation in system design
- The Post-Quantum Cryptography Mandate: Building Cryptographically Agile Systems for the Quantum Era