GloFo's 12nm FD-SOI: why it makes headlines in China
As you've probably seen in (excellent!) recent semiwiki postings by Eric Esteve and Scotten Jones, 12nm FD-SOI has now officially joined the GlobalFoundries’ roadmap. Eric and Scotten did a great job of putting many things in perspective. But this is a big piece of news, so here I propose looking at it from yet another perspective, adding a few details from GloFo's press releases, and showing some supporting slides from their presentations at the FD-SOI Forum in Shanghai last month. Why the italics? Read on.
First, just to be clear, GloFo's target with 12FDX, as it's called, is intelligent, connected systems. They say it's beating 14/16nm FinFET on performance, power consumption (by 50%) and cost. Add back bias and it beats 10nm FinFET. Customer product tape-outs are expected to begin in the first half of 2019. That should put them in a pretty sweet spot for the leading edge of their target customers doing those “intelligent, connected systems”.
To read the full article, click here
Related Semiconductor IP
- SerDes Hard Macro-IP in GlobalFoundries 22FDX
- Automotive 12bit Sigma-Delta ADC - GlobalFoundries 22FDX
- 5V ESD Clamp in GlobalFoundries 180nm LPe
- 1x64 Bits OTP (One-Time Programmable) IP, GlobalFoundries 22nmFDX 0.8V/1.8V Process
- GLOBALFOUNDRIES 40nm LP 3.3V-2.5/1.1V Power Regulator
Related Blogs
- FD-SOI, an Opportunity for China?
- GlobalFoundries Endorse ST/LETI FD-SOI 22nm!
- GlobalFoundries FD-SOI. Yes, It's True
- GlobalFoundries 22nm FD-SOI: What Happens When
Latest Blogs
- Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
- AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP
- Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution
- Scale-Up Ethernet Ecosystem Ramps Up: Cadence ESUN Controller IP Available
- Advancing Europe’s Automotive Innovation Ecosystem: Arteris Continues Its Work in the RIGOLETTO Project