Accelerating the Future of RISC-V
The freedom of RISC-V enables a bright future for SiFive
What a time to be in the Semiconductors and CPU industry! As an industry, we are experiencing a perfect storm. With the rise of machine learning, cloud computing, and autonomous driving; the need for advancement in computing has never been greater. This is happening at a time when Moore’s law has considerably slowed and dennard scaling has come to an end. Architectural innovation is required to break out of the current logjam, but the closed nature of proprietary ISAs that have dominated our industry for three decades are unwieldy and unsuitable for application-specific computing needs going forward.
To read the full article, click here
Related Semiconductor IP
- RISC-V Debug & Trace IP
- RISC-V IOPMP IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- 64-bit RISC-V core with in-order single issue pipeline. Tiny Linux-capable processor for IoT applications.
- Multi-core capable RISC-V processor with vector extensions
Related Blogs
- How Network-on-Chip Architectures Are Powering the Future of Microcontroller Design
- The Power of Shifting Left: Cadence Accelerating Innovation with Arm
- The Future of AI is Modular: Why the SiFive-NVIDIA Milestone Matters
- eUSB2V2: Trends and Innovations Shaping the Future of Embedded Connectivity
Latest Blogs
- Designing for What Comes Next in AI
- Secure boot on Efinix Titanium Ti60: Getting started with KiviBoot-Tiny
- How Long Does It Take to Port a New AI Model? Minutes Now, and Falling
- PCI Express Security and TEE Integration, Part 1 - Establishing Trust
- World Models at the Edge, in Real Time: V-JEPA 2.1 on the Quadric GPNPU