On-chip ESD/EOS/Latch up/EMC protection for high voltage and BCD processes
Design cost reduction Designing ESD protection can be very costly: frequently many test structures are required, analysis needs t…
Robust circuit and interface solutions
PhyStar® robust circuit and interface solutions, including custom digital I/O’s, circuits that handle transient disturbances (e.g.
1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+
The 1.2V Thin Gate GPIO is an IP macro for on-chip integration.
On-chip ESD/EOS/Latch up protection for advanced and low voltage processes
Scalable on-chip HBM (MM) levels Some applications need higher ESD robustness levels.
1.8V Capable GPIO on Samsung Foundry 4nm FinFET
The 1.8V capable GPIO is an IP macro for on-chip integration.
3.3V Capable GPIO on TSMC 28nm RF HPC+
The 3.3V capable GPIO is an IP macro for on-chip integration.