Silterra 0.11um Ultra Low Leakage 6track Std Cell Library
Silterra 0.11um Ultra Low Leakage 6track Std Cell Library
Silterra 0.11um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.11um Ultra Multiple power supply IO Library with high voltage tolerance
Silterra 0.18um ULL Process 7track Power Management Kit
Silterra 0.18um Ultra Low Leakage 7track PMK Library
Silterra 0.18um ULL Process 7track Std Cell Library
Silterra 0.18um Ultra Low Leakage 7track Std Cell Library
Silterra 0.18um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.18um Ultra Multiple power supply IO Library with high voltage tolerance
Power-On Reset - Flexible Threshold (0.9–1.6V), Ultra Low Current (210nA) - Silterra 0.16 um
This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.16μm C16G CMOS technology.
Power-On Reset - Flexible Threshold (1-1.3V), Ultra Low Current (100nA) - SilTerra 0.16µm CL160G
This macro-cell is an ultra low consumption Power-On Reset (POR) core designed for SilTerra 0.16μm CL160G CMOS technology.
Silterra 0.11um Ultra Low Leakage 6track PMK Library
IP
Silterra 0.11um ULL Single-Port/Dual-Port SRAM, Single-Port Register File and Via ROM Compiler
VeriSilicon SMSB 0.11um Ultra-Low-Leakage(ULL) Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor …
Silterra 0.13Z 1.5v High Density Single-Port SRAM Compiler
VeriSilicon SMSB 0.13Z Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor Manufacturing Corporatio…
LogicFlash® Embedded MTP in Silterra 180nm~110nm
LogicFlash® MTP?????CMOS???????????????,????????,??????????,?????1?????,??IP??,???1KB~64KB???????,??????2????????
150mA Buck Converter - SilTerra 0.18um BCD
This block is a 150mA, synchronous step-down integrated buck DC-DC converter IP core designed for SilTerra D18V (0.18μm BCD).
500mA buck converter - 500mAoutputcurrent - SilTerra 0.18µm
CM1811ff is a 500mA, synchronous step-down integrated buck DC-DC converter IP core optimized for 3MHz fixed frequency operation a…
Silterra 0.11um High Density Single-Port Register File Compiler
VeriSilicon SMSB 0.11um Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor Manufacturing Corporati…
Silterra 0.11um High Density Single-Port SRAM Compiler
VeriSilicon SMSB 0.11um Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor Manufacturing Corporati…
VeriSilicon SMSB 0.18um Ultra-Low-Leakage(ULL) Process Synchronous Memory Compiler optimized for Silterra Malaysia Semiconductor …
This IP is a programmable Analog PLL suitable for high speed clock generation.
Power-On Reset - Threshold (1.6V1.8V), Low Current (1.5µA) - Silterra 0.18 um
This macro-cell is a low consumption Power-On Reset (POR) core designed for SilTerra 0.18μm CL180GH5 5V CMOS technology.
General Purpose PMU - Thermal shutdown and overvoltage protected - SilTerra 0.18 um
This macro-cell is a Power Management Unit (PMU) core designed for Silterra 0.18µm C18GH5 CMOS technology in TO (thick oxide) and…
Ultra Low Power PMU - (2.18µW) - SilTerra 0.18 um
This macro-cell is an ultra low consumption Power Management Unit (PMU) core designed for Silterra 0.18µm C18G CMOS technology TO…