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Vendor:
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Category:
Standard Cell Libraries
Silterra 0.18um ULL Process 7track Std Cell Library
Silterra 0.18um Ultra Low Leakage 7track Std Cell Library
Overview
Silterra 0.18um Ultra Low Leakage 7track Std Cell Library
Key features
- Silterra 0.18um Ultra Low Leakage Process
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for Ultra High-Density and Low-Power.
- Engineered for Synthesizability and Routability.
- Scan Flip-flops for Design for Testability Support.
- Clock Gating for power optimization
- More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| Silterra | 180nm | G | Pre-Silicon |
Specifications
Identity
Part Number
SMSB18ULL 7T STD cells
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP
Provider
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Frequently asked questions about standard cell libraries
What is Silterra 0.18um ULL Process 7track Std Cell Library?
Silterra 0.18um ULL Process 7track Std Cell Library is a Standard Cell Libraries IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for silterra Pre-Silicon.
How should engineers evaluate this Standard Cell Libraries?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Standard Cell Libraries IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.