The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
- Channel Coding
- In Production
- Immediate
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
Reed Solomon Encoder and Decoder
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
Wide range of dedicated, high performance, low latency RS FEC IP cores to meet any error correction requirement The Reed Solomon …
Reed Solomon II Intel® FPGA IP Core
The Reed Solomon II Intel® FPGA intellectual property (IP) core offers a fully parameterizable Reed Solomon encoder and decoder.
High-Speed Reed Solomon Intel® FPGA IP Core
The High-Speed Reed Solomon Intel® FPGA intellectual property (IP) core uses a large parallel architecture to achieve a large thr…
Reed Solomon Error Correcting Code ECC
RS Code Statistics for different values of `$mm` `$tt` Zero latency, low gate count, low power, asynchronous Reed Solomon Code ba…
Zero latency, low gate count, low power, asynchronous Reed Solomon Code based Erasure code for RAID FEC: The whole operation of e…
Configurable Reed Solomon Encoder
A fully configurable Reed Solomon Encoder compliant with the requirements of nearly all modern standards that use Reed-Solomon er…
Configurable Reed Solomon Decoder
configurable Reed Solomon Decoder compliant with the requirements of nearly all modern standards using Reed-Solomon error correct…
Reed Solomon Codec (Errors-only)
The CMS0007 Reed Solomon Codec provides ultimate flexibility in its operation and build.
CYB-RS-en core implements the Reed Solomon encoding algorithm and is parameterized in terms of bits per symbol, maximum codeword …
CYB-RS-de core implements the Reed Solomon decoding algorithm and is parameterized in terms of bits per symbol, maximum codeword …
The Reed-Solomon Forward Error Correction (RS-FEC) IP Solution implements the RS-FEC sublayer specified in IEEE 802.3by/D3.1.
Medium throughput, compact Reed Solomon decoder
This implementation of a M=8 Reed Solomon decoder has been designed to use a minimum set of resources whilst maintaining a medium…
High Throughput Reed Solomon Decoder
This is a Reed Solomon decoder capable of operating with shortened codewords.
The CMS0013 Reed Solomon Codec provides ultimate flexibility in its operation and build.
This high performance, fully configurable Reed Solomon Encoder IP Core is intended for use in a wide range of applications requir…
This high performance, fully programmable Reed Solomon Decoder IP Core is intended for use in a wide range of applications requir…
Highly Integrated Reed Solomon Codec
ntRSC_IESS core is a integrated solution implementing a time-domain Reed-Solomon Forward Error Correction algorithm.