Overview
ntRSC_IESS core is a highly integrated solution implementing a time-domain Reed-Solomon Forward Error Correction algorithm. The core supports several programming features including codeword size, error threshold, number of parity bytes, reverse or forward order of the output, mode of operation (encode, decode or pass-through), shortened code support, erasures or error only decoding. Very low latency, high speed, simple interfacing and programmability make this core ideal for many applications including Intelsat IESS-308, DTV, DBS, ADSL, Satellite Communications, High performance modems and networks.
Learn more about Channel Coding IP core
Noesis Technologies has announced today the immediate availability of its ntFFT_UHS IP Core that implements a customized FFT/IFFT programmable fixed point (Decimation in Frequency - DIF) transform processor, supporting low latency, streaming, ultra-parallel complex samples per clock cycle in natural order.
Noesis Technologies has announced today the immediate availability of its ntAES_XTS IP Core, a fully compliant core with AES-XTS algorithm standardized at NIST SP800-38E and IEEE 1619-2007 recommendations targeting disk encryption applications at sector (data unit) addressable level.
Noesis Technologies announced today the immediate availability of its fully configurable FFT/IFFT processor (ntFFT). ntFFT core is a fully configurable solution that performs the FFT and IFFT transform. It is on-the-fly programmable in terms of transform size and type.
Noesis Technologies announced today the immediate availability of its ntOFDM_BBP custom baseband processor, which implements the physical layer of an OFDM, time division duplexing (TDD) system. The baseband processor includes both transmission and reception bit-level and symbol-level processing chains including a sophisticated synchronization unit.
Noesis Technologies announced today the immediate availability of its CVSD voice codec algorithm compliant IP Core.