UALink serves as a critical interface in data centers, designed to facilitate scaling up AI networks enabling high-speed data tra…
- UALink Security
UALink serves as a critical interface in data centers, designed to facilitate scaling up AI networks enabling high-speed data tra…
Synopsys IO TSMC N3P GPIO 1.8V additional metal stack
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliabilit…
Automated Hierarchical Test for Analog/Mixed Signal IPs The SLM SHS IP is an automated hierarchical test solution for efficiently…
SLM High-Speed Access & Test IP
Leverage existing functional interfaces to access DFT or SLM network over entire silicon lifecycle The SLM High-Speed Access and …
PCIe 7.0 Controller (can be configured to support EP, RP, DM, or SW applications)
The configurable and scalable Synopsys Controller IP for PCI Express® (PCIe®) 7.0 supports all required features of the PCI Expre…
The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, a…
Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
USB-C 3.1/DP TX PHY in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) in GF (22nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
The silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE…
USB-C 3.1 SS/SSP PHY in Type-C in TSMC (16nm, 12nm, N7, N6, N5, N5A)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB 3.1 PHY (10G/5G) in Samsung (14nm, 11nm, 10nm, 8nm, SF5, SF5A, SF4E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm, 5nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.