The 8b-10b Verification IP provides an effective &efficient way to verify the 8b-10b components of an IP or SoC.
- Ethernet
The 8b-10b Verification IP provides an effective &efficient way to verify the 8b-10b components of an IP or SoC.
Intel® Arria® 10 and Intel® Cyclone® 10 PCIe Hard IP
Intel® Arria® 10 and Intel® Cyclone® 10 GX FPGAs include a configurable, hardened protocol stack for PCI Express* that is complia…
Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)
Xilinx provides a PCI Express Gen3 integrated block for PCI Express® (PCIe) in the Virtex®-7 XT and HT family of FPGAs.
Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY
The USB3.0 Super-Speed / PCI Express Combo PHY is a programmable IP that is compatible with the PHY Interface for PCI Express and…
The PCIe Gen 5 Verification IP provides an effective & efficient way to verify the components interfacing with PCIe Gen 5 interfa…
Used by all PCIe, IP, and SoC design verification teams for all generations.The Cadence® Verification IP (VIP) for PCI Express® (…
The USB3.0 PHY IP is designed according to the USB 3.0, USB2.0 Specification.
USB3.0 PHY on GF22FDX and Samsung 28nm FDSOI
The USB3.0 PHY IP is designed according to the USB 3.0, USB2.0 Specification.
PCIe 6.0 / CXL 3.0 PHY & Controller
The PCIe 6.0 and CXL 3.0 IP solutions combine high-performance controllers and PHYs, fully compliant with PCIe 6.0, CXL 3.0, and …
The NVMe 2.2 Verification IP provides an effective & efficient way to verify the components interfacing with the PCIe/AXI interfa…
The NVMe 2 Verification IP provides an effective & efficient way to verify the components interfacing with CXL interface of an IP…
The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, a…
PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design.
USB 3.0 Device Upgrade IP Core
The USB 3.0 Device Upgrade IP enables designers in the PC, mobile, consumer and communication markets to bring significant power …
The USB 3.0 Device IP core enables designers in the PC, mobile, consumer and communication markets to bring significant power and…
The Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be…
The Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be…
CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io
The Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be…
CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b
The Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be…
Adds security Interfaces, features to CXL 3.0 Premium controllers
The Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be…