IP
- LDO Voltage Regulator
- Mass Production
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
IP
DC/DC - Input 5.0V/4.2V, output 1.8V/1.2V
IP
DC/DC - Input 1.2~2.5V, output 3.3V
IP
PLL - Input 8~24MHz, output 12~48MHz
IP
PLL - Input 4~27MHz, output 96~288MHz
IP
PLL - Input 4~24MHz, output 540~756MHz
IP
PLL - Input 27MHz, output 504~756MHz
IP
RC Oscillator - 15KHz RC oscillator
IP
Crystal Oscillator - 32.768KHz crystal oscillator
32.768KHz crystal oscillator
The Utility IO Multiplexer module provides a multiplexing function between two IO vectors to one IO vector.
Synchronous ONFI NAND Flash Controller
Synchronous ONFI NAND Flash Controller
This analog 2 to 1 MUX is designed for low speed application
SD/SDIO 3.0 Card Controller
IBM10SF 1.0v/2.5v 10bit R2R DAC
The I65GV25_R2RDAC_01 specifies a 10-bit R2R DAC.
8 Channel Stand-alone CAN controller
The TEECAN8 is an IC targeted to industry applications using CAN.
In machine vision components, especially cameras, the standard GigE Vision has almost established.
Included with Xilinx ISE Software The BUFT-based Multiplexer Slice IP core supports buses of up to 64 bits wide and 1 to 64 input…
The LD-based Parallel Latch IP core is a latch-based data register with 1 to 64 bits width.
Included with Xilinx ISE Software The BUFE-based Multiplexer Slice IP core supports buses of up to 64 bits wide and 1 to 64 input…
DDR3 SDRAM Controller