Variable FFT (run time choice of FFT size)
This FFT circuit employs unique architectural characteristics, different than any other FFT implementation.
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- LTE and WiMax OFDMA
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Variable FFT (run time choice of FFT size)
This FFT circuit employs unique architectural characteristics, different than any other FFT implementation.
LTE Single Carrier FFT Circuit
Centar's DFT circuit can perform all 35 transform sizes needed to implement the LTE SC-FDMA protocols.
Radiation-tolerant XH018 buffered voltage reference cell
The RTVREF cell of the nSBG_XF180_1V8 library is a buffered radiation-tolerant bandgap reference voltage generator IP cell powere…
Radiation-tolerant XH018 bandgap reference cell
The RTBG cell of the nSBG_XF180_1V8 library is a radiation tolerant bandgap reference voltage generator IP cell powered at 1.8V ±…
XH018 buffered voltage reference cell
The VREF cell of the nSBG_XF180_1V8 library is a buffered high precision bandgap reference voltage generator IP cell powered at 1…
62.5MHz to 2GHz low jitter 1.2V supply PLL
The nSPLL_SIL130G_1V2 cell is a fully-programmable PLL IP cell powered at 1.2V ±10% designed on the Silterra 130 G technology.
The DVB-S2X decoder is a silicon-proven, scalable solution that allows for symbol rates of up to 100 MSymbols/s on FPGAs.
24.84 MHz phase-frequency detector with charge pump
The device consists of phase frequency detector (PFD), charge pump and lock detector (LD) PFD compares phases of a divided VCO si…
1 Gbps Rail to Rail LVDS receiver
065TSMC_LVDS_08 is LVDS receiver with rail to rail input range.
065TSMC_LVDS_07 is LVDS transmitter.
16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC
Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two …
The 10-bit 100 MSPS ADC employs a high-performance front-end sample-and-hold with differential multi-stage pipelined architecture…
AGAD11 is a 10bit 100MSPS pipeline A/D converter.
TSMC 65LP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) p…
TSMC 65LP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designe…
TSMC 65LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 …
Library of LVDS IOs cells for TSMC 65LP
The nSIO2000_TS65LP_2V5_1V2 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.2V or…
TSMC 65GP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) p…
TSMC 65GP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designe…
TSMC 65GP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC …