SMIC 0.13μm 1.62~3.3v->1.2v 230mA Power Regulator
Targeted in SMIC 0.13μm 1.2v/3.3v logic process, current design of Power Regulator is to provide 1.2v power supply which is regul…
- SMIC
- 130nm
- G
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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SMIC 0.13μm 1.62~3.3v->1.2v 230mA Power Regulator
Targeted in SMIC 0.13μm 1.2v/3.3v logic process, current design of Power Regulator is to provide 1.2v power supply which is regul…
The S13V33_PGA_01 integrates: one MIC input gain boost amplifier, two 2-channel programmable gain amplifiers, two 3-1 input signa…
This PLL is designed for audio clock generation.
The S13V33_DLL_04 generates 4-channel fixed timing delay.
The S13V33_DAC_01D specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems.
SMIC 0.13um 10Bit 2Channel 24MHz
The VeriSilicon S13V33_ADC_06 IP includes an embedded 10bit 48MHz ADC IP(ADC_03).
The VeriSilicon S13V33_ADC_03 IP is a 10 bit, low power, and pipeline analog to digital converter capable of running at up to 50M…
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
32/64/128/256/512/1024/2048/4096 Point FFT Core
The FFT4096 core the FFT and IFFT computations for N input samples, where N can be any power of 2 between 32 and 4096 (32, 64, 12…
ColdFire V2 Core with single Fast Ethernet and AMBA peripherals connected in a subsytem
The ColdFire V2 Core & Standard Product Platform 5208 (CFV2SPP5208) combines the ColdFire V2 Core with industry proven platform p…
The CMS0041 DVB-T2 Modulator provides all the necessary processing steps to modulate single transport stream into a complex I/Q s…
Serial Peripheral Interface (SPI) Controller
Dolphin Technology provides Serial Peripheral Interface (SPI) IP which enables an AHB/APB host to access a serial device at high-…
The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream.
This is a 32768Hz crystal oscillator specifically designed for ultra-low power application.
This IP is a programmable Analog PLL suitable for high speed clock generation.
The present IP is a Voltage Detector (VDT) circuit.
The present Power-On-Reset circuit generates system reset pulses (RST) when both the 2.5V and 1.2V power suppliers are turned on.
The present Power-On-Reset circuit generates system reset pulses (RST) when the 3.3V power supplier is turned on.
IBM 65nm 2.5/1.2V 32768Hz Crystal Oscillator
This is a 32768Hz crystal oscillator specifically designed for ultra-low power application.
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.