Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
- SMIC
- 40nm
- LL
- Available on request
Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
LDPC codec for NAND FLASH error correction
The LDPC IP is aLow-densityparity-check code encoder and decoder designed for 3D NAND Flash error correction to address the relia…
PowerVR Series8XE Plus Graphics Processor
Series8XE Plus GPUs available in a range of configurations Available in two- and four-cluster configurations, Series8XE Plus is d…
PowerVR Series8XE Plus Graphics Processor
Series8XE Plus GPUs available in a range of configurations Available in two- and four-cluster configurations, Series8XE Plus is d…
PowerVR Series8XE Plus Graphics Processor
Series8XE Plus GPUs available in a range of configurations Available in two- and four-cluster configurations, Series8XE Plus is d…
The CCSDS-122-E encoder core from Alma Technologies is a and self-contained implementation of the CCSDS122.0-B-1 image data compr…
OpenGL® ES2.0 compatible 3D graphics IP core
The world’s smallest-class OpenGL® ES2.0 compatible 3D graphics IP core.
2D Graphics Hardware Accelerator (AXI4 Bus)
The DB9200AXI4 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Generates bitmaps fr…
The logiCLK is a programmable clock generator logicBRICKS IP core with twelve independent and fully configurable clock outputs.
High Profiles H.264 Encoder − High 10, High 4:2:2 and High 4:4:4 (12-bit 4:2:2 or 4:2:0) Profiles
The H264-HP-E core is an and self-contained ITU-T H.264 High profiles hardware encoder.
Baseline Profile H.264 Encoder
The H264-BP-E core is an self-contained hardware H.264 encoder that conforms to the ITU-T H.264 Constrained Baseline Profile.
Scalable Ultra-High Throughput 8/10/12-bit JPEG Decoder
The UHT-JPEG-D core is a scalable, ultra-high throughput, 8-bit Baseline and 10/12-bit Extended hardware JPEG decoder, designed t…
Scalable Ultra-High Throughput 8/10/12-bit JPEG Encoder with Video Rate Control
The UHT-JPEG-E core is a scalable, ultra-high throughput, 8-bit Baseline and 10/12-bit Extended hardware JPEG encoder, with optio…
The H264-MP-E core is an self-contained hardware H.264 encoder that conforms to the ITU-T H.264 Main Profile.
Scalable 3D Graphics Accelerator
The logi3D graphics accelerator IP core is specifically designed for the new Xilinx Zynq-7000 All Programmable SoC.
BitBLT Graphics Hardware Accelerator (AXI4 Bus)
The DB9100AXI4 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from comma…
Our Standard Cell Libraries are designed to meet the rigorous demands of modern semiconductor applications, including automotive,…
Single 1024-bit SIMD DSP for Vision/Radar/Lidar/AI