The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
- ARC
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
ARC HS47D 32-bit, dual-issue processor core, ARCv2DSP ISA, with 100+ DSP instructions and I&D cache
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
The ARC® HS45D and HS47D processors feature a dual-issue, 32-bit, RISC + DSP architecture for use in embedded applications where …
ARC HS45Dx2 dual-core version of dual-issue HS45D with ARCv2DSP ISA, with 100+ DSP instructions
The ARC® HS45D and HS47D processors feature a dual-issue, 32-bit, RISC + DSP architecture for use in embedded applications where …
The ARC® HS45D and HS47D processors feature a dual-issue, 32-bit, RISC + DSP architecture for use in embedded applications where …
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
ARC HS48 32-bit, dual-issue processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
ARC HS46 32-bit, dual-issue processor core, ARC V2 ISA, for embedded applications
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
ARC HS44x4 quad-core version of dual-issue HS44 for real-time embedded applications
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
ARC HS44x2 dual-core version of dual-issue HS44 for embedded real-time applications
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
ARC HS44 32-bit, dual-issue processor core, ARC V2 ISA, for embedded applications
The ARC® HS44, HS46, and HS48 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications w…
The FastMath Pack is a math processing accelerator for the ARC HS family
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
L2 cache option for multicore versions of ARC HS36 and HS38 processors
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS38x4 quad-core 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS38x2 dual-core 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS38 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…