Low power 8-bit ADC, 2Mhz , 600uA - 3.3V
8-bit ADC in 0.35um HHNEC CZ6H process 600uA @ 2Mhz
- 8 Bit
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Low power 8-bit ADC, 2Mhz , 600uA - 3.3V
8-bit ADC in 0.35um HHNEC CZ6H process 600uA @ 2Mhz
Fully Configurable Radix 2 FFT/IFFT Processor
ntFFT core is a fully configurable solution that performs the FFT and IFFT transform.
Serializer 32:1 for 8.5-11.3Gb/s for SONET/SDH, 10Ge, XFI, Back Plain
PMCC_SER12G is a macro-block designed for robust 8.5-11.3Gb/s data 32:1 serialization independent on data coding.
Deserializer 1:32 for 8.5-11.3Gb/s for SONET/SDH, 10Ge, XFI, Back Plain
PMCC_DSER12G is a macro-block designed for robust data/clock recovery and demultiplexing 1:32.
8/10/12-bit Extended JPEG Encoder with Optional Video Rate Control
The JPEG-E-X core is a standalone and high-performance 8-bit Baseline and 10/12-bit Extended JPEG encoder for still image and vid…
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Inte…
ITU-Ghn LDPC Encoder / Decoder
TC4400 is a LDPC decoder core that is fully compliant with ITU G.hn (wireline home networking) specifications.
512B/ECC16 Nand Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
Standard Definition Video (PAL/NTSC) De-Interlacer, Basic Algorithm
The xc-SDDIB is a low-cost deinterlacing IP core that converts a standard 4:2:2 formatted interlaced video stream into a 4:2:0 pr…
Standard Definition Video (PAL/NTSC) De-Interlacer, Advanced Algorithm
The xc-SDDIA core converts a standard 4:2:2 formatted interlaced video stream into a 4:2:0 progressive format, which can be used …
High-performance Low-memory Mixed Radix FFT
This FFT is an efficient implementation of the Decimation in Frequency (DIF) Cooley-Tukey FFT.
1KB/ECC40 NAND Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
Noesis Technologies ntE1_G704 Framer/Deframer is designed for E1 networks and is compliant with ITU recommendations G.704, G.706,…
This is a high performance pipelined implementation of AES optimized for encryption of uncompressed video on low cost FPGA famili…
The Helion SNOW3G core efficiently implements the stream cipher used as the basis for the UEA2 confidentiality algorithm and UIA2…
Certified USB 5G & 10G Host Controller
USB 5G, 10G Host controller is a configurable core and implements the USB Host functionality that can be interfaced with third pa…
Certified USB 5G & 10G, USB2 Hub controller
USB 5G, 10G and 2.0 Hub controller is a configurable core and implements the USB Hub functionality that can be interfaced with th…
Dual FPD-link Transmitter, 24 Bits Color, 20-170 Mhz (SVGA/UXGAW/Full HDTV)
Now available up to 170 Mhz per channel !
High Performance DTMB (GB20600-2006) Demodulator Core
Digital demodulator fully supporting GB20600-2006 China DTV standard.
The ntG711_CMP core implements the ITU G.711 compliant compressing.