Synopsys, Inc.
•
HQ:
USA
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
- TSMC
- 3nm
- N3P
Compare 863 SerDes IP Listing from 76 vendors
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Synopsys, Inc.• HQ: USA
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
- TSMC
- 3nm
- N3E
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Synopsys, Inc.• HQ: USA
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
- TSMC
- 3nm
- N3E
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Synopsys, Inc.• HQ: USA
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
- TSMC
- 12nm
- FFC+
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Synopsys, Inc.• HQ: USA
Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…
- Intel Foundry
- 16nm
- FFL
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Silicon Library Inc.• HQ: Japan
SD4.x UHSII is PHY IP solution for UHS-II interface for next generation of ultra high speed used in both SDHC and SDXC.
- Single-Protocol PHY
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Signature IP Corporation• HQ: USA
Controller + ATC + ATS + DTI · CXL.io · CXL.cache · CXL.mem · Memory pooling
- CXL
- Full compliance with CXL 3.…
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Comcores• HQ: Denmark
solution that integrates both hardware and software components including a TSN-capable Ethernet switch, a Root of Trust security …
- System Controller
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Altera• HQ: USA
R-Tile is a FPGA companion tile that supports configurations up to PCIe 5.0 x16 in Endpoint (EP), Root Port (RP), and Transaction…
- PCI Express
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Chip Interfaces ApS• HQ: Denmark
Industry , Silicon Proven, 32 Gbps per pin, backed by a portfolio of verification tools, PHY interoperability and integration.
- UCIe
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Chip Interfaces ApS• HQ: Denmark
This JESD204 Verification IP provides an and efficient solution for verifying and debugging these standards in a UVM simulation e…
- Verification IP
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KNiulink Semiconductor Ltd.• HQ: China
With sophisticated architecture and technology, the SerDes PHY IP with PMA and PCS layer is designed for low power and high perfo…
- Single-Protocol PHY
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Obsidian Technology• HQ: USA
The OTC9115 is a , low cost, single chip cable marker for USB PD Type-C (baseband) cables.
- USB
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SmartDV• HQ: India
Fibre Channel over Ethernet Verification IP provides an efficient and smart way to verify Fibre Channel over Ethernet MAC, PCS an…
- Verification IP
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SmartDV• HQ: India
Fibre Channel Verification IP provides an smart way to verify the Fibre channel MAC, PCS and serdes of a SOC or a ASIC.
- Verification IP
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Truechip Solutions• HQ: USA
The MASS Solution VIP provides a Verification solution for Mipi Automotive SerDes Solutions (MASS), it is an effective & efficien…
- Verification IP
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Cadence Design Systems, Inc.• HQ: USA
Most advanced PHY and controller IP for HPC, AI/ML, data communications, networking, and storage systems
- Multi-Protocol PHY
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Synopsys, Inc.• HQ: USA
The 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution…
- Single-Protocol PHY
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224G Ethernet PHY, TSMC N3P x1, North/South (vertical) poly orientation
Synopsys, Inc.• HQ: USAThe 224G Ethernet PHY IP, an integral part of the high-speed SerDes IP portfolio, meets the growing high bandwidth and low latenc…
- TSMC
- 3nm
- N3P
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224G Ethernet PHY, TSMC N2P x4, North/South (vertical) poly orientation
Synopsys, Inc.• HQ: USAThe 224G Ethernet PHY IP, an integral part of the high-speed SerDes IP portfolio, meets the growing high bandwidth and low latenc…
- TSMC
- 2nm
- N2P