Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
- Post Quantum
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Compact and Secure Post-Quantum Signature SW Library for Resource-Constrained Devices As classical digital signature algorithms f…
Advanced DPA- and FIA-Resistant Software Library
The AES-SW library delivers high-performance protection against side-channel (SCA) and fault injection attacks (FIA) through OTA …
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
LPDDR6/5X/5 PHY V2 - TSMC N5A for Automotive, ASIL B Random, AEC-Q100 Grade 2
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
LPDDR6/5X/5 PHY V2 - TSMC N3A for Automotive, ASIL B Random, AEC-Q100 Grade 2
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
LPDDR6/5X/5 PHY V2 - Intel 18A-P
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
Maximum performance for running Linux high-end applications.
64-bit RISC-V core with in-order single issue pipeline based complex.
Tiny, Ultra-Low-Power Embedded RISC-V Processor
The BA5x-TN is a compact, ultra-low power, 32-bit, deeply embedded processor IP core.
Low-Power Embedded RISC-V Processor
The BA5x-LP is a efficient, low-power, 32-bit, deeply embedded processor IP core.
Enhanced-Processing Embedded RISC-V Processor
The BA5x-EP is a -featured 32-bit RISC-V embedded processor IP core optimized for complex, processing-demanding applications.
Vector-Capable Embedded RISC-V Processor
The EMSA5-GP is a -featured 32-bit RISC-V embedded processor IP core optimized for processing-demanding applications.