Line-Rate UDP/IPv6 Offload for Modern FPGA Designs UOE6 is Atomic Rules’ next-generation UDP Offload Engine, purpose-built for IP…
- Ethernet
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Line-Rate UDP/IPv6 Offload for Modern FPGA Designs UOE6 is Atomic Rules’ next-generation UDP Offload Engine, purpose-built for IP…
Dual Port Register File Compiler (1 Read-only port, 1 Write-only port) - GF 22FDX+
2 Port Register File Bit Cell Power Supply (V) TP185SL 0.8
Single Port High-Speed Multi Bank SRAM Memory Compiler on GF 22FDX+
High Speed Multi Bank 32KWords Deep.
Single Port Low Leakage Register File Compiler - GF 22FDX+
SP Ultra Low Leakage Reg File.
Single Port Low Leakage SRAM Memory Compiler on GF 22FDX+
SP Ultra Low Leakage SRAM.
Single Port Low Leakage Register File Compiler - GF 22FDX+
Single port register file compiler with low power retention mode and three speed options Bit Cell Power Supply (V) P110UL 0.8
Single Port Low Leakage SRAM Memory Compiler on GF 22FDX+
Single port SRAM compiler with optional redundancy, low power retention mode, and three speed options Bit Cell: P110UL Power Supp…
5G LDPC Decoder
5G Polar Decoder
4G/5G Dual Mode Cell Search
LTE Turbo Decoder
LTE Viterbi Decoder
IPSEC AES-256-GCM (Standalone IPsec)
XIP7213E implements the Internet Protocol Security (IPsec) as standardised in RFC4303 and RFC4305.
Real-time Pixel Processor for Vision applications
Dream Chip’s Real-time Pixel Processor for Vision applications is a scalable and configurable Standard Dynamic Range (SDR) capabl…
eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
RapidFlex eFPGA IP provides a reconfigurable, upgradeable, and iterative logic computing layer for SoCs, MCUs, AI accelerators, i…
Microsecond Channel (MSC/MSC-Plus) Controller
The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect a microcontroller or SoC to external…
Silicon agnostic and fully compliant implementation of UALink_200 specification The Chip Interfaces UA Link TL IP Core is a high-…
Silicon agnostic and fully compliant implementation of UALink_200 specification The UA Link DL IP Core is a high-performance, sil…
The Ultra Accelerator Link (UALink) Verification IP (VIP) provides a bus functional model (BFM) with integrated automatic protoco…
Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
High RF performance at the lowest cost The icyTRX-LE-22 RF transceiver PHY IP delivers an optimal trade-off between power consump…