Serdes 32:1 for 8.5-11.3Gb/s for SONET/SDH, 10GbE, XFI, Back Plain
PMCC_SERDES12G is a macro-block consisting of a 32:1 serializer and 1:32 deserializer with supporting functions such as CDR, CMU,…
- GlobalFoundries
- 65nm
- LP
- In Production
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Serdes 32:1 for 8.5-11.3Gb/s for SONET/SDH, 10GbE, XFI, Back Plain
PMCC_SERDES12G is a macro-block consisting of a 32:1 serializer and 1:32 deserializer with supporting functions such as CDR, CMU,…
NIST FIPS-197 Compliant Ultra-Low Power AES IP Core
ntAES8 core implements NIST FIPS-197 Encryption Standard.
The VK-402 searches only within a fixed number of lattice points, where the number of considered lattice points decreases as we d…
Dual SATA Host controller on Virtex 5 FXT FPGA
The LDS SATA HOST DUAL XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
High-throughput Low-memory Viterbi Decoder
This IP core is available in either normal or high throughput configurations.
This implementation of the AES-CCM algorithm implements the full NIST draft SP800-38C specification.
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
The demodulator is designed to be used together with a cable tuner and an analog to digital converter (ADC).
High-performance implementation of Z80/Z180 instruction set
Two clock cycle machine cycle implementation of the Z80/Z180 instruction set.
Smallest, Lowest Power ARM Multicore Applications Processor
The Arm® Cortex®-A5 processor is the smallest, lowest power Arm multi-core processor capable of delivering the internet to the wi…
25 Gb/s AES-ECB 128/192/256 Crypto Cores
Concurrent EDA AES cores implement the 128-bit block size NIST FIPS AES Algorithm.
The ntG711_EXP core implements the ITU G.711 compliant expanding.
The SNOW-IP-46 (EIP-46) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as s…
FPD-link, 30Bits Color LVDS Receiver, 150Mhz (SVGA/WXGA)
Now available up to 150Mhz (90Mhz previously) V-Trans 's FPD Link Receiver Macro is based on National Semiconductor openLDI speci…
Dual RSDS Transmitter, 24/18-bit color, 40-300Mb/s (SVGA/UXGA/full HDTV) LCD & Plasma display
This RSDS Transmitter interface IP is based on RSDS “Intra-Panel” Interface Specification rev1.0, dated May 2003 that allow the t…
EA/MZ Modulator Driver 1.25Gb/s to 11.3Gb/s
The PMCC_EAMD12G is designed to directly drive the inputs of EA or MZ Modulators or EML devices at data-rates up-to 11.3Gbps.
M8051EW V3.0+ Fast 8-bit Microcontroller with on-chip debug
The M8051EW V3.0 is a configurable softcore implementation of the industry standard 8051 microcontroller that features a two-cloc…
M8051W V 5.0 Fast 8-bit Microcontroller
The M8051W V5.0 is a high performance core that executes each machine cycle in two clock cycles, giving a clock-for-clock perform…
The M8052 is a straightforward implementation of an 8-bit microcontroller and is clock for clock compatible with the classic Inte…
The M8051 is a configurable soft-core implementation of the industry standard 8051 microcontroller that features a clock compatib…