Learn more about Modulator IP core
A software-defined radio (SDR) terminal promotes programmable realizations of the physical layer functionalities. A lot of research work has been done in applying DSPs and FPGAs to implement the baseband functionalities of the physical layer.
In this paper, a hybrid architecture that combines an application specific integrated circuit (ASIC) and a field-programmable analog array (ASIC-FPAA) is proposed to address the performance-security trade-off in analog circuits.
Low-power event-based Analog Front-Ends (AFEs) are essential for building efficient, end-to-end neuromorphic signal processing systems. In this paper, the authors present an event-based AFE Application-Specific Integrated Circuit (ASIC) optimized for biomedical signal acquisition and encoding.
As AI workloads scale exponentially, bandwidth has become the new bottleneck. This article explores how Celestial AI’s Photonic Fabric™ redefines interconnect performance, and how Sofics’ low-cap ESD and power clamp IP enabled its integration on TSMC’s 5nm platform.
In this fourth part of Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications whitepaper, the pure audio performance will be discussed.
This paper describes a CSoC platform and configurable digital subsystem IP which can be deployed for development of IOT edge devices. The paper encompasses the different attributes of IOT edge device that can cater multiple industry segments, key features and benefits of CSoC platform, components of the digital subsystem IP that enables rapid prototyping of SoCs for IOT applications.
