The 10/100/1000Mbps Tri-mode Ethernet MAC offers an IEEE802.3-2008 compliant solution that meets the requirements for tri-mode LA…
- Ethernet
- Stable, Proven IP
- Available Now
- IEEE 802.3
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The 10/100/1000Mbps Tri-mode Ethernet MAC offers an IEEE802.3-2008 compliant solution that meets the requirements for tri-mode LA…
Certified USB 5G & 10G Dual Mode Controller
USB 5G, 10G Dual Mode controller is a configurable core and implements the USB Host functionality or USB Device functionality sel…
I2C Controller IP – Master, Parameterized FIFO, AXI Bus
The DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…
I2C Controller IP – Master, Parameterized FIFO, AHB Bus
The DB-I2C-M-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…
I2C Controller IP- Master / Slave, Parameterized FIFO, APB Bus
The Digital Blocks DB-I2C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I2C Bus in Standard-Mo…
I2C Controller IP- Master / Slave, Parameterized FIFO, AHB Bus
The DB-I2C-MS-AHB Controller IP Core interfaces a microprocessor via the AMBA AHB Bus to an I2C Bus in Standard-Mode (100 Kbit/s)…
I2C Controller IP- Master / Slave, Parameterized FIFO, AXI Bus
The DB-I2C-MS-AXI Controller IP Core interfaces a microprocessor via the AMBA AXI Bus to an I2C Bus in Standard-Mode (100 Kbit/s)…
16/32-bit Microprocessor with BDM
The D68000-BDM soft core is binary-compatible with the industry standard 68000 32-bit microcoprocessor.
Advanced Flash Controller Interface Core
The IPC-BL157A-ZM, Flash Controller Interface (AFCI) is a register level interface that allows software and hardware state machin…
10/100 Mb Media Access Controller with RMII
Our solution is a hardware implementation of media access control protocol defined by the IEEE standard.
High Performance Second Generation Extended MIPI CSI2 Receiver
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps.
Digital IIR filter with APB interface
A range of 5th to 11th order digital IIR filters for conditioning and optionally decimating data from an external source and to D…
JVC Object-Based Gloss Enhancer
JVC's Object-Based Gloss Enhancer IP, which is already used in its products, is now available for licensing.
The AR34P2A specifies a mass-production proven, low power mono audio CODEC IP for multimedia audio / voice phone system.
16-Bit Sigma-Delta Stereo Audio CODEC with Microphone and Headphone, Fujitsu 65nm
The AR34F5B specifies a very low power stereo audio CODEC IP for multimedia audio system.
Temperature sensor consists of built-in 10-bit R-2R DAC, diode and own reference voltage former.
USB 2.0 Device, Software based enumeration RAM Interface (USB20SR)
The USB 2.0 Device, Software Enumeration (USB20SR) IP Core is a RAM based USB 2.0 device core with 32-bit Avalon/AXI/AHB Lite int…
Programmable 6-bit CMOS frequency divider
The programmable 6-bit CMOS frequency divider is a set of two independent circuits.
100G Ethernet Solution (MAC + 100GBase-R PCS)
The 100Gbps Ethernet IP solution offers a fully integrated IEEE802.3ba compliant package for NIC (Network Interface Card) and Eth…
The logiMLB IP core from Xylon's logicBRICKS IP library supports implementation of the SMSC's Media Local Bus (MediaLB) inter-chi…