The DB-I2C-S-Hs-Mode I2C Slave Controller IP Core interfaces user Registers to an I2C Bus or Memory (SDRAM / SRAM / Flash / FIFO)…
- I2C / I3C
- Successful in Customer Implementations
- Immediately
- Philips/NXP – The I2C-Bus S…
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The DB-I2C-S-Hs-Mode I2C Slave Controller IP Core interfaces user Registers to an I2C Bus or Memory (SDRAM / SRAM / Flash / FIFO)…
The D68HC11F is a synthesisable SOFT Microcontroller IP Core, fully compatible with the Motorola 68HC11F1 industry standard.
8-bit Microcontroller IP - legacy architecture - raplacement of 68HC11K MCU's
The D68HC11K is synthesisable soft IP Core Microcontroller, fully compatible with the Motorola MC68HC11K industry standard.
LIN Bus Controller – Basic and Safety-Enhanced
DCD-SEMI believes that even though something may be small or slow, it can still offer maximal efficiency and ultimate reliability.
The D6803 is synthesisable, SOFT Microcontroller IP Core, fully compatible with the Motorola MC6803.
I2C Controller IP – Master, Parameterized FIFO, Hs-Mode (3.4 Mbps) AXI/AHB/APB/Avalon Buses
The DB-I2C-M-Hs-Mode Controller IP Core interfaces a microprocessor via the AMBA AXI / AHB / APB Bus or Avalon Bus to an I2C Bus …
GDA's USB 3.0 SSIC controller is a configurable core and implements the USB 3.0 SSIC functionality that can be interfaced with th…
The AES-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the AES algorithm making the solution sui…
DSI transmitter controller for application
The eSi-QRD-LSL is a QR-Decomposition Least Squares Lattice (QRD-LSL) core is a high throughput IP core that finds application in…
Charge pump (CP) is a switched current sources controlled by phase-frequency detector which injects or removes some charge to inc…
Continuously Variable Slope Delta Modulation
The growth in wireless communication systems, cellular mobile radio and VoIP technology has created the imperative need for bandw…
Charge pump (CP) is a switched current sources controlled by phase-frequency detector which injects or removes some charge to inc…
Phase-frequency detector in CMOS logic
The phase-frequency detector (PFD) consists of a signal level converter from differential reduced swing ECL to single-ended full …
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration …
The I2C library provides the bidirectional I/O for two-line serial communication per Rev.
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15 / SSTL_18 library supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling.
The DDR3 / DDR4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell…
Phase-frequency detector in ECL logic
The phase-frequency detector (PFD) consists of 2 D-trigger with reset from external circuit, performed in ECL logic and multiplex…
I2C Controller IP – Master / Slave, Parameterized FIFO, Hs-Mode (3.4 Mbps) AXI/AHB/APB/Avalon Buses
The DB-I2C-MS-Hs-Mode Controller IP Core interfaces a microprocessor via the AMBA AXI / AHB / APB Bus or Avalon Bus to an I2C Bus…