Vendor: NTLab Category: PLL

Phase-frequency detector in ECL logic

The phase-frequency detector (PFD) consists of 2 D-trigger with reset from external circuit, performed in ECL logic and multiplex…

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Overview

The phase-frequency detector (PFD) consists of 2 D-trigger with reset from external circuit, performed in ECL logic and multiplexer, which allow to switch the input signals to the corresponding inputs.
The block is fabricated on AMS BiCMOS 0.35 um technology.

Key features

  • AMS BiCMOS 0.35 um
  • Differential structure
  • Ability to work with VCOs with both positive and negative frequency dependence of the control voltage
  • Input frequencies up to 100MHz
  • Only-up/only-down test modes
  • External reset circuit
  • Documentation
  • Portable to other technologies (upon request)

Block Diagram

350AMS_PFD_04 block diagram

Applications

  • Phase-locked loop synthesizer

What’s Included?

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Specifications

Identity

Part Number
350AMS_PFD_04
Vendor
NTLab
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

NTLab
HQ: Lithuania
Contact NTLab

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Frequently asked questions about PLL IP cores

What is Phase-frequency detector in ECL logic?

Phase-frequency detector in ECL logic is a PLL IP core from NTLab listed on Semi IP Hub.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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