The MVD ISDB-T core is a drop-in module that includes the following functions : • Input data framer from DVB-SPI source (MPEG-TS …
- Modulation Demodulation
- June 2016
- ARIB STD-B31
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The MVD ISDB-T core is a drop-in module that includes the following functions : • Input data framer from DVB-SPI source (MPEG-TS …
OpenGL® ES2.0 compatible 3D graphics IP core
The world’s smallest-class OpenGL® ES2.0 compatible 3D graphics IP core.
Vector Graphics IP core supporting OpenVG1.1 subset
Vector graphics IP core with the world’s smallest logic size, realizing a further cost reduction of embedded devices that require…
High-performance, low-power 2D composition IP core for embedded devices
High-performance, low-power 2D composition IP core for embedded devices.
The MVD Multi-RTP transmitter allows the transmission of several RTP streams on an Ethernet Network.
The 3DES core is a drop-in module that includes the following functions : • 192-bit key size • Single or Triple Data Encryption S…
130iHP_PA_02 is E class power amplifier (PA).
YouPHY-Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstr…
The logiDROWSINE is a computer vision IP core that detects driver drowsiness and distraction based on facial movements monitored …
UDP Network Interface with Ethernet MAC for the M8051W & M8051EW
The UDPMAC implements a UDP transport layer, and IP layer functions, compatible with the RFC768 and RFC791 protocols.
The Atria Logic AL-AVPLR-IPC is a compact and low power, embedded AVC (H.264) file-based AV decoder IP core, targeted for industr…
The Microtronix Camera Link Transceiver IP Core is designed for building vision systems incorporating Camera Link™ communication …
CSI2 TX; Camera Serial Interface, MIPI Compliant
CSI2 – TX is part of HCL’s MIPI® compliant offerings.
H.264 Low Power & Low Latency Hardware Video Decoder
The Atria Logic AL-H264D-HW is a hardware-based, low power, low latency, feature-rich, H.264 (AVC) Baseline Profile video decoder…
The logiJPGD Multi-Channel Motion JPEG Decoder is JPEG standard Baseline DCT compliant decoder IP core for still image and video …
IEEE 802.1ae MACSEC IP Core for 40 Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
Scalable & Royalty-Free 32-bit CPU
The D32PRO is a royalty free, silicon proven, high performance soft core of a single-chip 32-bit embedded controller, with Floati…
JPEG Codec 8K(YUV422) 48fps@200MHz,
The KJN-8EX conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still im…
Camera/HDMI Video Input Interface
Camera/HDMI Video Input Interface core capture the incoming clocked video of horizontal and vertical active picture data and remo…
Video Decoder Interface core accepts BT601/656 video frames (digitized NTSC/PAL) in 10-bit Y'CbCr 4:2:2 format from a video decod…