CAST IP Listing

The ASRC core is a compact and high-performance audio sample rate converter.

• Filters Transforms

The GPIO-APB core is used to create functions in a system that are not implemented with dedicated controllers, and require simple…

• GPIO

The H264-E-CFS IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standar…

• H.264 / AVC

The AXI4-DMA IP core implements a Direct Memory Access (DMA) engine that efficiently moves data between AXI4-Stream peripherals a…

• Bus Fabric

The ASCON-F IP core is a compact, high-throughput hardware engine implementing the lightweight authenticated encryption with asso…

• Symmetric Crypto

The TCPIP-1G/10G core implements a TCP/IP Hardware Protocol Stack.

• Ethernet

The APB-SBS subsystem integrates typical microcontroller peripherals connected on the an AMBA® APB bus with a bridge to AHB or AX…

• Bus Fabric

The PCI-T32 implements a target PCI interface compliant with the PCI 2.3 specification.

• PCI

The SM4 IP core implements a custom hardware accelerator for the SM4 symmetric block cipher, specified in Chinese national standa…

• SM4

The H264-E-HIS IP core is a video encoder compliant to the High 10 Intra profile of the ISO/IEC 14496-10/ITU-T H.264 standard.

• H.264 / AVC

This Video Over IP Subsystem integrates H.264 Decompression, Transport Stream and RTP/UDP/IP de-capsulation to enable the rapid d…

• H.264 / AVC

This Video Over IP Subsystem integrates H.264 compression, Transport Stream and RTP/UDP/IP encapsulation to enable the rapid deve…

• H.264 / AVC

The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to N…

• SHA3

This JPEG decompression IP core supports the Baseline Sequential DCT and Extended Sequential DCT modes of the ISO/IEC 10918-1 sta…

• Image Conversion

The JPEG-DX-S IP core is an area-efficient, high-performance JPEG decoder conforming to the Baseline Sequential DCT and the Exten…

• Image Conversion

This JPEG decompression IP core supports the Baseline Sequential DCT mode of the ISO/IEC 10918-1 standard.

• Image Conversion

This JPEG compression IP core supports the Baseline Sequential DCT and the Extended Sequential DCT modes of the ISO/IEC 10918-1 s…

• Image Conversion

This JPEG compression IP core supports the Baseline Sequential DCT and Extended Sequential DCT modes of the ISO/IEC 10918-1 stand…

• Image Conversion

This JPEG compression IP core supports the Baseline Sequential DCT modes of the ISO/IEC 10918-1 standard.

• Image Conversion

The H264-LD-BP IP core implements a silicon and energy efficient hardware video decoder able to process H.264 streams produced by…

• H.264 / AVC