Programmable 9-bit CMOS low-frequency divider (5...511 dividing ratio)
The programmable CMOS low-frequency divider design is based on the 9-bit counter.
Programmable CMOS frequency divider (32...16383 dividing ratio)
The programmable CMOS frequency divider is a set of serially connected dividers with the varied dividing ratio 2/3.
Programmable CMOS HF divider (16…4095 dividing ratio)
The programmable CMOS frequency divider consists of two independent circuits.
Programmable 9-bit CMOS frequency divider (2…511 dividing ratio)
The programmable CMOS frequency divider is a set of 8 serially connected dividers with the varied dividing ratio 2/3.
DisplayPort and HDMI Transmit technologies are complex mixed signal designs which require both high performance analog design (eq…
This IP is a programmable Analog PLL suitable for high speed clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
RF and Analog GPS/GNSS Front End for GPS, GLONASS, Galileo and Beidu
The software definable GNSS core enables simultaneous reception of all commercial GNSS signals in the 1560-1610MHz frequency rang…
This IP is a programmable Analog PLL suitable for high speed clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
TSMC CLN55LP 55nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN55LP 55nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN55LP 55nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28LP 28nm DDR DLL - 90MHz-450MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28LP 28nm DDR DLL - 120MHz-600MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28LP 28nm DDR DLL - 189MHz-945MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28HP 28nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28HP 28nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN28HP 28nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…