What is Programmable CMOS HF divider (16…4095 dividing ratio)?
Programmable CMOS HF divider (16…4095 dividing ratio) is a Clock Generator IP core from NTLab listed on Semi IP Hub.
Vendor:
NTLab
Category:
Clock Generator
Programmable CMOS HF divider (16…4095 dividing ratio)
The programmable CMOS frequency divider consists of two independent circuits.
Overview
The programmable CMOS frequency divider consists of two independent circuits. The first one a set of 8 serially connected dividers with the varied dividing ratio 2/3. This structure is especially effective for wide range of dividing ratio since the number of triggers to accomplish the specified ratio is minimized. The second divider is based on the prescaler with the varied dividing ratio 4/5 and the two programmable binary-decimal counters.
The dividing ratio is 16…4095. Input frequency is 1000...1900 MHz.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
Key features
- iHP SGB25V
- Wide range of dividing ratio (16…4095)
- High operating frequency
- Low current consumption
- Compact structure
- Portable to other technologies (upon request)
Block Diagram
250iHP_NDIV_02 block diagram
Applications
- PLL frequency synthesizer
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Specifications
Identity
Part Number
250iHP_NDIV_02
Vendor
NTLab
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Lithuania
Frequently asked questions about Clock Generator IP cores
How should engineers evaluate this Clock Generator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Clock Generator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.