Vendor: SmartDV Category: HBM

WIDE IO2 Synthesizable Transactor

WIDE IO2 Synthesizable Transactor provides a smart way to verify the WIDE IO2 component of a SOC or a ASIC in Emulator or FPGA pl…

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Overview

WIDE IO2 Synthesizable Transactor provides a smart way to verify the WIDE IO2 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's WIDE IO2 Synthesizable Transactor is fully compliant with standard JESD229-2 Specification and provides the following features.

Key features

  • Supports 100% of WIDE IO2 protocol standard JESD229-2
  • Supports all the WIDE IO2 commands as per the specs
  • Quickly validates the implementation of the WIDE IO2 standard JESD229-2
  • Support programmable burst lengths: 4,8
  • Checks for following:
    • Check-points include power up, initialization and power off rules
    • State based rules, active command rules
    • Read/Write command rules etc
    • All timing violations
  • Supports all mode registers programming
  • Supports write data mask and data bus inversion
  • Supports GPIO mode test access
  • Supports post package repair
  • Supports power down features
  • Supports TRR mode
  • Supports full-timing as well as behavioral versions in one model
  • Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations

Block Diagram

WIDE IO2 Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the WIDE IO2 testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and function's used in verification env
  • Documentation contains User's Guide and Release notes

Specifications

Identity

Part Number
WIDE IO2 Transactor
Vendor
SmartDV
Type
Silicon IP
Controller / PHY
Controller

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about HBM IP core

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SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about HBM Interface IP

What is WIDE IO2 Synthesizable Transactor?

WIDE IO2 Synthesizable Transactor is a HBM IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this HBM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this HBM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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