Vendor: Techno Mathematical Co., Ltd. Category: Video Processing

Visibility Improver IP

“LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), a…

Overview

“LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), and dark images due to backlight or insufficient illumination.

This Hardware IP is suitable for security, surveillance applications, etc., as well as for improving image recognition rate by AI.

Key features

  • Improves the visibility in various shooting conditions.
  • Supports both AXI4-stream I/F and DE (data enable) I/F as input/output video interface.
  • Selectable starting by software or hardware event.

Block Diagram

Benefits

  • throughput
    • 1pixe/clock, 4pixel/clock
  • Image size
    • 320x240P~4096x2160P. Must be multiple of 4 in case of 4pixel/clock
  • color format
    • 8bit YUV444, 8bit YUV422
  • Video signal interface
    • valid/ready signal handshake in AXI4-stream standard compliant
    • Fixing the ready of master to high, fixed cycle delay operation by DE (data enable) is possible
  • Control interface
    • APB3

Applications

  • Amusement
  • Car-mounted system
  • Digital camera / Digital video camera
  • Low-delay transmission system
  • Video camera / Surveillance camera / Web camera

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
TM2797
Vendor
Techno Mathematical Co., Ltd.
Type
Silicon IP

Provider

Techno Mathematical Co., Ltd.
HQ: Japan
"DMNA" is our proprietary algorithm. We have been developing systems and solutions based on our core compression technology, which has been cultivated through our high quality software and hardware development technology using "DMNA". We will continue to contribute to the realization of a prosperous society through the resolution of our customers' IT issues.

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is Visibility Improver IP?

Visibility Improver IP is a Video Processing IP core from Techno Mathematical Co., Ltd. listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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Semiconductor IP