Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Analog

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Int…

SMIC 130nm G View all specifications

Overview

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13¦Ìm Logic 1P8M Salicide 1.2/3.3V process. This library supports Device Under Pad (DUP). This library includes analog I/O cell part and digital I/O cell part, and the digital I/O cells can take 5V tolerance and work with configurable and variable driving strength between 2mA - 24mA. This library supports Inline I/O pad.

Key features

  • SMIC 0.13¦Ìm Logic 1P8M Salicide 1.2V/3.3V process
  • Low area and low cost design using DUP technique
  • 1.2V core power, 3.3V IO, digital IO supports 5V tolerance
  • This library includes analog I/O cell part
  • Configurable output driving capability with different slew rate
  • Supports configurable pull up and pull down resistor
  • Supports both CMOS input and Schmitt input with LVTTL compatible
  • Provides 2Mhz ~ 27Mhz OSC IO cell
  • Suitable for six, seven, or eight metal layers of physical design
  • Competitive pad pitch and height
  • More detail, please go to below website to contact VeriSilicon location sales:http://www.verisilicon.com/cn/contactus.asp

Benefits

  • Databook in electronic form
  • Verilog models and Synopsys synthesis models
  • Cadence Silicon Ensemble Abstracts (LEF), Avanti! Apollo data, GDS II, LVS netlist

Silicon Options

Foundry Node Process Maturity
SMIC 130nm G —

Specifications

Identity

Part Number
S13V33_DUPIO_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

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Frequently asked questions about Analog I/O Pad Library IP cores

What is VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library?

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library is a Analog IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Analog?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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